Sony/Philips Digital Interconnect Format (generally referred to as S/PDIF herein) is a digital audio interface standard used in consumer digital audio equipment, AES is a digital audio interface more often found in professional-grade equipment. In essence, S/PDIF specifies a Data Link Layer protocol and choice of Physical Layer specifications for carrying digital audio signals between devices and stereo components. The S/PDIF format is more recently part of a larger set of standards IEC 60958 (often referred to as AES/EBU). Both S/PDIF and AES/EBU formats are a unidirectional serial interface in which the audio signal is encoded with an embedded clock so that only a single data wire is needed. There is no specification of data rate or resolution in SPDIF protocol. The data rate is determined by the equipment using SPDIF connectors from the SPDIF signal mutually accepted by the two pieces of audio hardware involved.
While in some cases the S/PDIF interface may be used to carry compressed digital audio, in other cases the S/PDIF may carry uncompressed digital audio from an audio source, such as a compact disc player, to a receiver. Compressed digital audio may include Dolby Digital, DTS surround sound, etc. The S/PDIF standard may be applied to either optical or coaxial S/PDIF connectors. Selection of one over the other rests mainly on the availability of appropriate connectors on the chosen equipment and the preference and convenience of the user.
As mentioned above, both clock information and data arrive via a serial interface for S/PDIF audio receivers. The S/PDIF audio receiver must attempt to synchronize to the transmitter. However, some S/PDIF audio receivers use independent clocks for input and output. In such cases, the input clock will synchronize to the S/PDIF signals, while the output clock will use a local clock source. This will tend to cause some difference between the input and output clock rate, which might lead the receiver to either overflow or underflow, thereby lowering audio performance.
In order to compensate for the above clock-related audio distortion, some prior art systems use a large internal buffer to smooth the clock difference out over a longer period of time. However, this approach is more costly given the large buffer that is required. Other prior art systems utilize a phase-locked loop (PLL) tuning circuit to adjust the output clock rate. Again, such systems are more costly and complex due to the additional PLL circuitry required. As such, there is a need for a method and apparatus for the synchronization of audio receiver clocks.